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Contact Info:
Point of Contact:
Reid Porter
Email: rporter@lanl.gov Phone 505 665 7508

Questions about this website: webmaster

 
Algorithms

A Recurrent Velocity Filter for Detecting Large Numbers of Moving Objects
R. Porter, A. Fraser, R. Loveland, E. Rosten, SPIE Defence and Security Symposium, 16-20 March, 2008.

A Recurrent Velocity Filter: Histogram experiments
R. Porter, Technical Report LA-UR 06-8578.

Building robust appearance models using on-line feature selection
R. Porter, E. Rosten, R. Loveland, Technical Report, LAUR 07-0614.

Unsupervised Adaptation to Improve Fault Tolerance of Neural Network Classifiers
A. Nugent, R. Porter, G. Kenyon, 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), Seattle, Washington, June 2004. LA-UR-04-1028

Weighted Order Statistic Classifiers with Large Rank-Order Margin
R. Porter, D. Eads, D. Hush, J. Theiler, Proceedings of the Twentieth International Conference on Machine Learning (ICML 20), 600-607, 2003. LA-UR-03-0545

Architectures

A Reconfigurable Computing Framework for Multi-scale Cellular Image Processing (draft)
Reid Porter, Jan Frigo, Al. Conti, Neal Harvey, Garret Kenyon, Maya Gokhale, to appear in the Journal of Microprocessors and Microsystems. LA-UR-05-7448

Optimizing Digital Hardware Perceptrons for Multi-Spectral Image Classification
R.Porter, Neal Harvey, Simon Perkins, James Theiler, Steven Brumby, Jeff Bloch, Maya Gokhale, John Szymanksi, J. Math. Imaging and Vision, Vol. 19, p. 133-150, 2003. LA-UR-03-0546

A Scalable Learning System for Video Recognition
R. Porter, C. Chakrabarti, N. Harvey, G. Kenyon, IEEE Aerospace Conference, Big Sky, Montana, March 2005. LA-UR-04-7701

Image Processing Algorithms and Architectures for Reconfigurable Computers(draft)
R. Porter, in Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays, Maya Gokhale, Paul Graham (eds), Springer, 2005. LA-UR-05-1419

Evolution on FPGAs for Feature Extraction
Reid Porter, PhD thesis, Queensland University of Technology, 2001, LA-UR-02-3396

Everything on the Chip: A Hardware-Based Self-Contained Spatially-Structured Genetic Algorithm for Signal Processing
S. Perkins, R. Porter and N. Harvey, ICES2000:  Third International Conference on Evolvable Systems, Edinburgh, Scotland, 17-19 April, 2000. LA-UR-99-6843

Evolving FPGA Based Cellular Automata,
R. Porter and N. Bergmann, SEAL'98 : Simulated Evolution and Learning, Canberra, 1998.

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